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Fed. Cir.

In re Rezanezhad Gatabi, No. 22-1580 (Fed. Cir. May 16, 2023)

Affirmed
Court
U.S. Court of Appeals for the Federal Circuit
Case No.
No. 22-1580
Decided
May 16, 2023
Judge
Stark, J.
Document
Nonprecedential Opinion
Length
10 pages

NOTE: This disposition is nonprecedential. United States Court of Appeals

for the Federal Circuit

IN RE: IMAN REZANEZHAD GATABI,

Appellant

2022-1580

Appeal from the United States Patent and Trademark Office, Patent Trial and Appeal Board in No. 16/045,675.

Decided: May 16, 2023

IMAN REZANEZHAD GATABI, San Jose, CA, argued pro se.

WILLIAM LAMARCA, Office of the Solicitor, United States Patent and Trademark Office, Alexandria, VA, argued for appellee Katherine K. Vidal. Also represented by THOMAS W. KRAUSE, FARHEENA YASMEEN RASHEED, PETER JOHN SAWERT.

Before PROST, CHEN, and STARK, Circuit Judges.

Iman Rezanezhad Gatabi (“Gatabi”) sought reissue of his U.S. Patent No. 9,406,758 (“’758 Patent”) in reissue application No. 16/045,675 (“’675 Application”). A Patent &2 Trademark Office (“PTO”) examiner issued a final office action, rejecting the ’675 Application’s claims 1-34. Gatabi appealed the rejections to the Patent Trial and Appeal Board (“Board”), which reversed the rejection of claims 20 and 33 and affirmed the rejection of the other claims (i.e., 1-19, 21-32, and 34). Gatabi timely appealed the portion of the decision affirming the examiner’s rejection. We affirm.

I

A

The claims under the reissue examination are directed to semiconductor devices with “sharp gate edges.”1 ’758 Pat. col. 1 lines 1-3. As the patent explains, “[i]t is generally known that the electric field is stronger near sharp edges” of biased conductors (that is, conductors to which voltage is applied). Id. col. 1 lines 48-49, col. 3 lines 50-52. The ’758 Patent teaches a “gate of a memory cell . . . designed in a way such that at least one of its edges in contact with a dielectric [i.e., electrical insulator] has an angle of less than 88 degrees.” Id. col. 1 lines 49-54, col. 3 lines 52-58. This results in “a smaller gate voltage [being] required to move charges . . . [thereby] improv[ing] the read and write speed” of the memory device. Id. col 1 lines 52-54, col. 3 lines 55-58. The ’758 Patent further explains that, with respect to certain specific types of transistors – “FinFETs, HEMTs and Tri-Gate transistors,” all of which open or close when a sufficient voltage is applied – “if sharp gate edges were implemented, a smaller change in the gate bias may be required to accumulate the charge in the channel3 under the gate and turn ON the device.” Id. col. 1 lines 55-58, col. 3 lines 58-62. In this manner, the “sharp gate edge” requires a lower voltage than the prior art to open or close the transistor, resulting in lower power consumption and faster transistors. Id. col. 1 lines 52-58, col. 3 lines 55-62.

Figures 4 and 7 (reproduced below) illustrate a FinFET transistor with a “sharp gate edge.”

Figure on page 3 of the opinion
Figure on page 3 of the opinion

For comparison, the ’758 Patent also includes Figures 3 and 6 (reproduced below), illustrating a prior art FinFET transistor without a “sharp gate edge.”

Figure on page 3 of the opinion
Figure on page 3 of the opinion

Independent claim 1 is representative of the claims on appeal, reciting:

4A device having a Fin, wherein the said Fin is made of at least one non-insulating material, wherein the said Fin is on a material region, wherein the interface between the said Fin and the said material region is just one flat surface, said device has a gate which is not in physical contact with the said Fin, wherein at least two surfaces of the said gate intersect each other in a gate edge, wherein the said gate edge is in contact with a dielectric material in at least two points, wherein the said gate surfaces form an internal gate angle of less than 88 degrees.

J.A. 3 (emphasis added).

B

U.S. Patent Publication No. 2006/0154426 A1 (“Anderson”), entitled “FinFETs with long gate length at high density,” discloses “fin-type field effect transistors (FinFETs) that allow[] the length of the FinFET fins to be increased by angling the fins with respect to the gate conductors and prevent[] the angled fins from increasing the size of the FinFET array by increasing the density of the fins.” J.A. 245. Figures 3 and 16 (reproduced below) illustrate a FinFET transistor where the “fins 54 are angled with respect to the gate conductors 102.” J.A. 246; see also J.A. 237-38.

Figure on page 4 of the opinion
Figure on page 4 of the opinion

Anderson’s specification discloses that “the angle between the fin 54 and gate conductors 102 could be between 5 and5 85 degrees, and more specifically between 30 and 60 degrees, and even more specifically 45 degrees.” J.A. 246.

II

As the appellant, Gatabi bears the burden to demonstrate that the Board committed reversible error. See In re Watts, 354 F.3d 1362, 1369 (Fed. Cir. 2004). In determining whether he has met his burden, we review the Board’s legal determinations de novo, and the Board’s factual findings for substantial evidence. See In re NuVasive, Inc., 842 F.3d 1376, 1379 (Fed. Cir. 2016). A finding is supported by substantial evidence if a reasonable mind might accept the evidence as adequate to support the finding. See Consol. Edison Co. v. NLRB, 305 U.S. 197, 229 (1938).

Anticipation is a question of fact reviewed for substantial evidence. In re Morsa, 713 F.3d 104, 109 (Fed. Cir. 2013). Obviousness is a question of law based on underlying facts. In re Ethicon, Inc., 844 F.3d 1344, 1349 (Fed. Cir. 2017). What a prior art reference discloses to a person of ordinary skill in the art is a question of fact. Para-Ordnance Mfg., Inc. v. SGS Imps. Int’l, Inc., 73 F.3d 1085, 1088 (Fed. Cir. 1995). Whether there is a motivation to combine prior art references is also a question of fact. See In re Gartside, 203 F.3d 1305, 1316 (Fed. Cir. 2000).

III

Gatabi contends the Board committed reversible error in two ways. First, the Board’s conclusion that claims 1, 2, 22, and 33 are anticipated by Anderson lacks substantial evidence because Anderson does not disclose the claim elements of an “internal gate angle of less than 88 degrees” and “just one flat surface.” Second, the Board’s obviousness analysis, by which it determined that claims 3-19, 21, 24-32, and 34 would have been obvious, was flawed for multiple purported reasons. Below we explain why we are unpersuaded by any of Gatabi’s contentions.

6A

The Board found that claims 1, 2, 22, and 33 of the ’675 Application were anticipated by Anderson. On appeal, Gatabi insists that Anderson does not disclose the limitation of an “internal gate angle of less than 88 degrees.” We disagree.

Gatabi’s principal basis for distinguishing Anderson is that Anderson’s drawings are, according to him, not drawn to scale, and they depict an angle in two-dimensional space while the claims relate to angles between three-dimensional objects. Gatabi’s contentions rely on the PTO’s Manual of Patent Examining Procedure (MPEP), which is not binding on this court, see Enzo Biochem, Inc. v. Gen–Probe Inc., 323 F.3d 956, 964 (Fed.Cir.2002), and on a misapplication of Hockerson-Halberstadt, Inc. v. Avia Group International, 222 F.3d 951, 956 (Fed. Cir. 2000), where we held that “patent drawings do not define the precise proportions of the elements and may not be relied on to show particular sizes if the specification is completely silent on the issue” (emphasis added). Paragraph 33 of Anderson expressly states (of Figure 3) “the angle between the fin 54 and gate conductors 102 could be between 5 and 85 degrees, and more specifically between 30 and 60 degrees, and even more specifically 45 degrees.” J.A. 246 ¶ 33. Hence, the specification is not silent but, rather, specifically informs an ordinary artisan that Anderson’s embodiments have an internal gate angle of less than 88 degrees. Moreover, Gatabi points to nothing in the record that undermines the Board’s evident understanding that a person of ordinary skill in the art would read the figures in Anderson, like those in Gatabi’s own patent, as two-dimensional depictions of three-dimensional realities. Anderson’s figures, and its specification’s discussion of them, provide substantial evidence for the Board’s finding that one of skill in the art would read Anderson to disclose internal gate angles of less than 88 degrees.

7Gatabi also argues that Anderson does not disclose an “interface between the said Fin and the said material region [that] is just one flat surface.” He disputes the Board’s finding that the top surface of Anderson’s element 52 is planar. Substantial evidence supports the Board’s finding that Anderson, in fact, discloses one flat surface. As the Board noted, Anderson’s figures show the top surface of element 52 as a flat surface. See J.A. 7. Anderson further teaches that, during the manufacturing process, “[t]he entire structure can be planarized,” and the laminated structure that includes element 52 can be “periodic[ally] planariz[ed].” J.A. 247. In contrast, Gatabi has not presented to the Board any evidence showing that the top surface of element 52 is in fact not flat.

Accordingly, we affirm the Board’s holding that claims 1, 2, 22, and 23 are anticipated by Anderson.

B

Gatabi also challenges the Board’s determination that claims 3-19, 21, 24-32, and 34 would have been obvious. His arguments, while numerous, lack merit.

Gatabi argues that “[t]he Board relied on references that did not recognize the unsolved problems and the solution” provided in his ’758 Patent. Appellant’s Br. 35. We have held, however, in an obviousness analysis, “the law does not require that the references be combined for the reasons contemplated by the inventor.” In re Beattie, 974 F.2d 1309, 1312 (Fed. Cir. 1992). Thus, “any need or problem known in the field of endeavor at the time of invention and addressed by the patent can provide a reason for combining the elements in the manner claimed.” KSR v. Teleflex Inc., 550 US 398, 420 (2007). There is simply no requirement that the Board rely on references that recognized the problem identified in the ’758 Patent.

Gatabi next faults the Board for failing to “provide any analysis of the third prong of Graham, the level of ordinary8 skill in the art.” Appellant’s Br. 43. However, “the absence of specific findings on the level of skill in the art does not give rise to reversible error where the prior art itself reflects an appropriate level and a need for testimony is not shown.” Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (internal quotation marks omitted). That is the situation here.

Gatabi then attacks the Board’s reasoning regarding the motivation a person of ordinary skill would have had to combine the prior art references relied on by the Board: Anderson, applicant admitted prior art, U.S. Patent Publication No. 2003/0178670 A1 (“Fried”), U.S. Patent Publication No.2008/0285350 A1 (“Yeh”), U.S. Patent Publication No. 2010/0240205 A1 (“Son”), Japanese Patent 05-102180 (“Katada”). We find, instead, substantial evidence for the Examiner’s articulation of a rationale for each combination of prior art, which the Board cited and adopted. See J.A. 8-10 (citing J.A. 83-85). Furthermore, although the Board combined as many as three prior art references to reject some of the ’758 patent’s claims, “a large number of references in a rejection does not, without more, weigh against the obviousness of the claimed invention.” In re Gorman, 933 F.2d 982, 986 (Fed. Cir. 1991).

Gatabi argues that “the combination of references that the Board relied on to reject claims 3-17 and 24-30 do[es] not teach all limitations of the claims.” Appellant’s Br. 41. This is essentially a reiteration of the argument Gatabi made with respect to anticipation, namely that Anderson does not disclose the claimed “sharp gate edge.” We disagree, and, for the same reasons given in connection with anticipation, we find substantial evidence for the Board’s finding that Anderson discloses all of the claims’ limitations.

Finally, solely with respect to claim 9, Gatabi argues that the combination of Anderson and applicant admitted prior art (i.e., Figure 6 of the ’758 Patent) does not teach9 “the edge of the opening in the said mask is positioned at an angle of less than 88 degrees relative to the position of the said edge of the opening in the said Fin mask in a lithography mask alignment process.” Appellant’s Br. 42. The Board’s final written decision does not explicitly address this contentions. “As we have said numerous times, failure to explicitly discuss every fleeting reference or minor argument does not alone establish that the Board did not consider it.” Yeda Rsch. V. Mylan Pharms. Inc., 906 F.3d 1031, 1046 (Fed. Cir. 2018). We find no reason to assume the Board failed to consider all of Gatabi’s arguments, notwithstanding its lack of citations to Gatabi’s briefs. See generally Novartis AG v. Torrent Pharms. Ltd., 853 F.3d 1316, 1328 (Fed. Cir. 2017). Among other things, the Board cited to, and approved of, the examiner’s findings in the final office action with respect to claim 9. See J.A. 8 (citing J.A. 84-85). There, for example, citing to Figure 17 and paragraphs 33 and 45-48 of Anderson, the examiner found that “Anderson teaches a method of making the FinFET device . . . [that] includes the step of using a lithography mask to pattern the silicon fins and the step of forming the gate at an internal angle of 45 degrees with respect to the fin.” J.A. 84. The examiner then found that Figure 6 of Gatabi’s ’758 Patent taught “a method of making a FinFET device including the step of using a lithography gate mask to make a gate over a fin, and the step of using a lithography fin mask for making the fin.” J.A. 84-85. This is substantial evidence for the Board’s affirmance of the examiner’s finding that the prior art disclosed all of the limitations found in claim 9 of the ’758 Patent.

Accordingly, substantial evidence supports the Board’s conclusions as to obviousness.

10IV

We have considered the Gatabi’s remaining arguments and find them unpersuasive. For the foregoing reasons, we affirm.

AFFIRMED

COSTS

No costs.

Footnotes

  1. 1 In context, a “gate” is a part of a transistor (i.e., switch) responsible for opening or closing the electrical path within the transistor. See Gov’t Br. 3-4 nn. 5-8. Applying a sufficient voltage to the gate opens or closes the transistor. Id. In a FinFET transistor, applying a sufficient voltage allows current to flow through a “fin.” Id.

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In re Rezanezhad Gatabi, No. 22-1580 (Fed. Cir. May 16, 2023).

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CAFC-22-1580-20230516
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