Pact XPP Schweiz AG v. Intel Corporation, No. 25-1419 (Fed. Cir. June 23, 2026)

DYK, Circuit Judge.

Appellant PACT XPP Schweiz AG (“PACT”) sued Intel Corporation (“Intel”) in the United States District Court for the District of Delaware alleging Intel’s computer-processor products infringed claims of U.S. Patent Nos. 8,312,301 (“’301 patent”) and 8,471,593 (“’593 patent”). PACT appeals the district court’s summary judgment of noninfringement as to both patents. We affirm.

I

The asserted patents are both directed to processing architecture in computer systems. The ’301 patent discloses a processor that may selectively change the operating clock frequencies of its constituent elements. Relevant to this appeal, representative claim 8 recites “a plurality of data processing elements adapted for programmably processing sequences.” ’301 patent claim 8. The ’593 patent discloses a multiple-core, multiple-memory processor in which some cores have a “physically dedicated connection” to a “physically assigned” memory unit. ’593 patent claim 1. Representative claim 1 recites “a plurality of data processing cores . . . wherein . . . each of at least some of the data processing cores includes a physically dedicated connection to at least one physically assigned one of the plurality of memory units.” ’593 patent claim 1.

3PACT sued Intel in district court, alleging that some of Intel’s multiprocessor computing systems (“accused products”) infringed claims of the ’301 and ’593 patents. The district court granted summary judgment of noninfringement as to both patents.

PACT timely appealed, and we have jurisdiction under 28 U.S.C. § 1295(a)(1). We review de novo the district court’s grant of summary judgment. MobileMedia Ideas LLC v. Apple Inc., 780 F.3d 1159, 1164 (Fed. Cir. 2015) (citing Gonzalez v. Sec’y of Dep’t of Homeland Sec., 678 F.3d 254, 257 (3d Cir. 2012)).

II

As to the ’301 patent, the district court construed the term “sequences” to require sequences of data, rather than sequences of instructions, based on arguments made by PACT during a parallel inter partes review proceeding before the patent office. The district court determined that there was no dispute that the accused products processed only sequences of instructions, not data, and concluded that the products could not infringe. PACT moved for reconsideration of summary judgment on the ’301 patent, arguing that an accused device may infringe an apparatus claim if it is capable of infringing. The district court denied PACT’s reconsideration motion, concluding that PACT failed to raise a capability-based infringement argument at summary judgment.

On appeal, PACT argues that the district court erred in granting summary judgment of noninfringement as to the ’301 patent. According to PACT, it presented evidence that the accused products were capable of data processing and that such capability alone may constitute infringement of an apparatus claim. See Finjan, Inc. v. Secure Comput. Corp., 626 F.3d 1197, 1204 (Fed. Cir. 2010); Intel Corp. v. U.S. Int’l Trade Comm’n, 946 F.2d 821, 832 (Fed. Cir. 1991). We see no error in the district court’s forfeiture determination. In opposing summary judgment, PACT4 stated only that its expert, Dr. Conte, “has offered evidence that the Accused Products sequentially processing [sic] data.” J.A. 14685 (citing J.A. 24308–16 ¶¶ 286–92).² This statement does not articulate an infringement theory relying on capability; instead, PACT argued that Intel’s processors process data. In his declaration, Dr. Conte opined that Intel’s “cores can process data in a sequential manner.” J.A. 24314 ¶ 290. But merely pointing to Dr. Conte’s declaration did not constitute an argument as to capability. Raising the issue in a reconsideration motion was not sufficient.

PACT concedes that if it failed to raise the capability argument, Intel would have been entitled to summary judgment on the ’301 patent. Oral arg. at 4:26–38. Accordingly, we see no error in the district court’s noninfringement summary judgment as to the ’301 patent.

III

PACT argues that the district court erred in granting summary judgment of noninfringement as to the ’593 patent. The district court construed “dedicated connection” to be “a connection designed to directly interconnect a particular device to a particular memory via a link inaccessible to other devices and memories,” based on arguments made by PACT to distinguish prior art in a parallel ex parte reexamination of the ’593 patent. J.A. 43. Determining that there was no dispute that the core-to-memory pathways in the accused products were shared with other cores and memories, the district court granted summary judgment of noninfringement of the ’593 patent. According to PACT, the district court incorrectly construed “physically dedicated connection” to effectively require all segments connecting a core and its paired memory to exclude use by5 other cores or memories. Instead, PACT urges that the claim limitation is met where “at least one segment in the end-to-end path” between a core and a memory is “uniquely devoted” to that pair. Appellant’s Br. 47.

The district court’s construction was correct and is supported by the prosecution history. During reexamination, PACT responded to an office action rejecting claim 1 on obviousness grounds by arguing that a “mere direct connection between two units is not a dedicated connection unless that connection is specifically devoted to connecting those two units, and thus not to other units.” J.A. 33956. Statements made by a patentee during reexamination inform claim construction. Presidio Components, Inc. v. Am. Tech. Ceramics Corp., 875 F.3d 1369, 1379–80 (Fed. Cir. 2017). PACT’s statement during reexamination supports the district court’s construction, “a connection designed to directly interconnect a particular device to a particular memory via a link inaccessible to other devices and memories.” J.A. 43. By contrast, PACT’s proposed construction is inconsistent with its reexamination statement because if only some of the physical segments of a connection are “specifically devoted,” other physical segments would be shared, and the connection cannot be said exclude “other units.” See J.A. 33956.

PACT also argues that, even under the district court’s adopted construction, there is a genuine dispute of fact concerning where the required “physically dedicated connection” begins and ends. Appellant’s Br. 51. PACT does not appear to dispute that the “CoreBo” and “CacheBo,” modules that provide access to processor cores and memory units respectively, contain shared lines. Instead, PACT points to Dr. Conte’s testimony that the CoreBo and CacheBo are “interfaces.” Id. (citing J.A. 33981 ¶ 172). However, PACT identifies no evidence that an “interface” should be considered part of a core or memory and not part of the core-to-memory connection that must be physically dedicated.

6We thus see no error in the district court’s noninfringement summary judgment as to the ’593 patent.

We have considered PACT’s remaining arguments and find them unpersuasive.

AFFIRMED